There are two trends in integrated circuits. The first is to smaller device dimensions and denser circuit layouts which drive ever smaller integrated circuit chip footprints. The second, is to specialized integrated chips, that contain relatively few devices (for example, thousands instead of millions) and can be made with very small horizontal chip dimensions. In fact, some applications of these specialized chips require very small footprint integrated circuits.
One problem with fabricating small footprint integrated circuits is the large amounts of space required just to dice the wafer on which the integrated circuits are fabricated on into individual integrated circuit chips. A second problem, is the vertical to horizontal aspect ratio of very small integrated circuits can easily result in the vertical dimension (thickness) of the integrated circuit chip being significantly greater than the horizontal dimensions of the integrated circuit chip, even to the point of limiting the usefulness obtained by shrinking the horizontal dimensions.
Therefore, there is a need for a method of fabricating micro-chip integrated circuits that results in significantly reduced micro-chip thickness and reduced waste of wafer area.